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Home Electrical and Electronics Electronic Circuit Design To design and set up a transistor series voltage regulator using BJT and Zener Diode.
Electronic Circuit Design Lab Experiments

To design and set up a transistor series voltage regulator using BJT and Zener Diode.



Aim

To design and set up a transistor series voltage regulator using BJT and Zener Diode.

  1. Load current vs output voltage
  2. Input voltage vs output voltage for a constant load current

Apparatus Required:

Breadboard,PCB

Circuit Diagram:

circuit-diagram

Theory:

An ideal power supply maintains a constant voltage at its output terminals, no matter what current is drawn from it. The output voltage of a practical power supply changes with load current, generally dropping as load current increases. The power supply specifications include a full load current rating, which is the maximum current that can be drawn from the supply. The terminal voltage when full load current is drawn is called the full load voltage (VFL). The no load voltage (VNL) is the terminal voltage when zero current is drawn from the supply, that is, the open circuit terminal voltage. One measure of power supply performance, in terms of how well the power supply is able to maintain a constant voltage between no load and full load conditions, is called its percentage voltage regulation.

An unregulated power supply has poor regulation, ie. output voltage changes with load variations. If a power supply has poor regulation it possesses high internal impedance. A simple emitter follower regulator is shown in Fig. 1. It is also called a series regulator since the control element (transistor) is in series with the load. It is also called as the pass transistor because it conducts or passes all the load current through the regulator. It is usually a power transistor.

The zener diode provides the voltage reference, and the base to emitter voltage of the transistor is the control voltage. The value of RS must be sufficiently small, to keep the zener in its reverse breakdown region. Writing Kirchoff’s voltage law to the output circuit.

V 00 + VBE-VZ= 0

VBE=VZ-V0

VBE=VZ-V0

If VZ is perfectly constant, the above equation is valid at all times, and any change in Vo must cause change in VBE, in order to maintain equality.When current demand is increased by decreasing RL, Vo tends to decrease. From the above equation, it is seen that as VZ is fixed, decrease in Vo increases in VBE. This will increase the forward bias of the transistor, thereby increasing level of conduction. Thus, the output current is increased to keep ILRL a constant. The reverse process occurs when RL is increased. Thus, the above circuit keeps the output voltage constant, even if the load varies widely.

Procedure:

Load regulation:

  1. The circuit is wired as per the circuit diagram shown in fig. 1.
  2. Keep the input voltage constant at Vimin , ie 10 V.
  3. Vary the load resistance. Note IL and VO for each setting of RL. Ensure that Vi remains same throughout
  4. Draw a plot between IL and VO

Line Regulation :Percent line regulation is another measure of the ability of a power supply to maintain a constant output voltage. In this case, it is a measure of how sensitive the output is to the changes in input or line voltage rather than to the changes in load. The specification is usually expressed as the percent change in output voltage that occurs per volt change in input voltage, with the load RL assumed constant.

  1. The circuit diagram is wired as per the circuit diagram shown in fig. 1.
  2. Keep the load resistance RL a constant.
  3. Vary the input voltage between the limits for which the regulator is designed (10 to 15V).
  4. Note the load voltage VO for each setting of Vin.
  5. Draw a graph between Vin (X axis ) and VL (Y axis).
  6. Make rest of the connections as shown in the connection diagram.
  7. Observe the final output and verify that the demodulator demodulates that channel data whose corresponding frequency synthesizer output is applied to the demodulator.
  8. Follow the same procedure for slow hopping scheme by changing the data rate and PRN sequence rate as shown in the table above for slow hopping scheme.

Observations:

Load Regulation

Load Current ILmA Output voltage V OV

Line Regulation

Imput Volatge ViV Output voltage V OV

Expected Output Plots

Expected-output-plots

Result:Line regulation and load regulation curves are plotted.

Viva Questions:

Q.-1. Why Zener diode work as voltage regulator?

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Q.-2. What is Line Regulation?

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Q.-3. What is Load Regulation?

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Q.-4. Analyze the working of Zener Diode?

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Q.-5. Explain the term Zener Breakdown?

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