Study of 4 Bit Serial in-Parallel out Shift Register

Objective:

Study of 4 Bit serial In-Parallel out Shift Register

Equipment Needed:

1. Digital board DB12.
2. DC Power Supply +5 V from external source.
   
3. Oscilloscope, Digital Multimeter.
   

Logic Diagram & Truth Table:

(Logic 1 = +5V & Logic 0= Gnd)

Theory

A register is a group of binary storage cells suitable for holding binary information. A group of flip-flops constitute a register, since each flip-flop is a binary cell capable of storing one bit of information. An n-bit register has a group of n flip-flops and is capable of storing any binary information containing n bits. In addition to the flip- flops, a register may have combinational gates that perform certain data processing tasks like when and how new information is transferred in to the register.

A register capable of shifting its binary information either to the right or to the left is called a Shift Register. The logical configuration of a Shift Register consists of a chain of flip-flops connected in cascade, with the output of one flip-flop connected to the input of next flip-flop. All flip-flops receive a common clock pulse, which causes the shift from one stage to the next.

4 bit serial in -parallel out Shift Register is shown in figure 1. The Q output of a given flip-flop is connected to the D input of the flip-flop at its right. Each clock pulse shifts the contents of the register one bit position to the right. The serial input determines what goes into the leftmost flip-flop during the shift. The serial output is taken from the output of rightmost flip-flop prior to the application of pulse. The register shifts its contents with every clock during the positive edge of the pulse transition.

There are parallel outputs Q0-Q3 with Q3 as LSB. MC is active high clock input i.e. data will shift to right on positive edge of clock pulse. MR is Master Reset input (active low i.e. negative edge trigger) to flip-flops to reset or clear output Q0-Q3 globally.

Procedure:

1. Connect +5 V and ground to their indicated position on DB12 experiment board
   from external DC power supply or from DC power block of Digital Lab
   Scientech 2611.
2. Switch on the power supply.
   
3. Clear the outputs Q0-Q3 by connecting + 5 V (logic 1) to MC input and ground
   or 0 V (logic 0) to MR input of Shift Register of figure 1 as per truth table 1.
   Observe output on multimeter. It will be 0 0 0 0.
   
4. Connect logic 1 to MR input and logic 0 to MC input.
   
5. Connect input 1 to Shift Register as per truth table 1.
   
6. Connect logic 1 to MC input.
   
7. Observe output on multimeter. It will be 1 0 0 0.
   
8. Repeat step 5, 6, 7 for different inputs as per truth table 1 and verify truth table.
   

Pinout diagrams (Pin 14=Vcc = +5 V) of 8 bit Serial In-Parallel out Shift Register